Adrian Avendano-Bolivar

Adrian Avendano is a PhD student in the University of Texas at Dallas for Professor Walter Voit. His research is focused on the design and fabrication of thin film transistors on shape memory polymers to implement flexible and stretchable electronics. Also studying the integration of these TFTs in applications such as pressure and stress sensors, as well as logic gates circuitry.  His experience centers in the fabrication of flexible circuits such as NANDs, NORs, inverters and operational amplifiers using organic and inorganic semiconductors.

Adrian was born in Saltillo Coahuila in Mexico. He finished his bachelor in Mechatronic Engineering in the Saltillo Technology Institute in 2007. After working for GE Electric Distribution Equipment division he started his PhD in UTD in 2008. In Summer 2011 he was an intern for Qualcomm in the QMT department. Expected graduation in August 2013.


  1. D.R. Allee, M.A. Quevedo-Lopez, S. Gowrisanker, A. E. Avendano-Bolivar, H. N. Alshareef, B. 72 Gnade S. Venugopal, R. Krishna, K. Kaftanoglu “Flexible CMOS and Electrophoretic Displays” Accepted.  Society of Information Display International Symposium (2009).


  1. A. Dey, S. M. Venugopal, Hongjiang Song, D. R. Allee, A. E. Avendano-Bolivar, M. Quevedo and B. E. Gnade, “Flexible Interface Electronics for Large Area Sensors”. Army Science Conferenc (2008)
  2. M. Quevedo-Lopez, Srinivas Gowrisanker, Husam Alshareef, Adrian Avendaño, Bruce Gnade, Sameer Venugopal, Korhan Kaftanoglu, Roshith Krishna and David Allee. “Reliability Studies of Fully Integrated Complementary Thin film Transistor Devices: Gate Dielectric Failure Mechanism”. Spring MRS San Francisco Ca 2009.
  3. M. A. Quevedo-Lopez, A. Avendano, D. Mao, B. E. Gnade, S. Venugopal, K. Kaftanoglu, A. Dey, D. Allee, “Reliability Improvement in Integrated Devices Using Low Temperature Hybrid Gate Dielectrics” Flextech 2010 Feb 2010 (Phoenix AZ) 2010.


  1. Aritra Dey, Adrian E.Avendano-Bolivar, Sameer M.Venugopal,  David R Allee, Manuel Quevedo and Bruce E. Gnade, ‘CMOS TFT Op-amps: Performance and Limitations,’  IEEE Electron Device Letters, May 2011.
  2. Mejia, I.; Salas-Villasenor, A.L.; Avendano-Bolivar, A.; Horvath, J.; Stiegler, H.; Gnade, B.E.; Quevedo-Lopez, M.A., “Low-Temperature Hybrid CMOS Circuits Based on Chalcogenides and Organic TFTs”, Electron Device Letters, IEEE, Vol 32, no.8, pp. 1086-1088, Aug. 2011.


  1. A. Avendano, M. R. Perez, H. J. Stiegler, B. E. Gnade, M. A. Quevedo-Lopez “Characterization of semiconductor/hybrid gate dielectric interfaces for  improved reliability organic thin film transistors” Flextech 2010 Feb 2010 (Phoenix AZ) 2010.